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2005 Microchip Technology Inc.
Preliminary
DS41265A-page 151
PIC16F946
12.1.5
STARTING A CONVERSION
The A/D conversion is initiated by setting the
GO/DONE bit (ADCON0<1>). When the conversion is
complete, the A/D module:
Clears the GO/DONE bit
Sets the ADIF flag (PIR1<6>)
Generates an interrupt (if enabled)
If the conversion must be aborted, the GO/DONE bit
can be cleared in software. The ADRESH:ADRESL
registers will not be updated with the partially complete
A/D
conversion
sample.
Instead,
the
ADRESH:ADRESL registers will retain the value of the
previous conversion. After an aborted conversion, a
2TAD delay is required before another acquisition can
be initiated. Following the delay, an input acquisition is
automatically started on the selected channel.
FIGURE 12-2:
A/D CONVERSION TAD CYCLES
12.1.6
CONVERSION OUTPUT
The A/D conversion can be supplied in two formats: left
or right shifted. The ADFM bit (ADCON0<7>) controls
the output format. Figure 12-3 shows the output
formats.
FIGURE 12-3:
10-BIT A/D RESULT FORMAT
Note:
The GO/DONE bit should not be set in the
same instruction that turns on the A/D.
TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9
Set GO/DONE bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
b9
b8
b7
b6
b5
b4
b3
b2
TAD10 TAD11
b1
b0
TCY TO TAD
Conversion Starts
ADRESH and ADRESL registers are loaded,
GO/DONE bit is cleared,
ADIF bit is set,
Holding Capacitor is Connected to Analog Input
ADRESH
ADRESL
(ADFM = 0)MSB
LSB
bit 7
bit 0
bit 7
bit 0
10-bit A/D Result
Unimplemented: Read as ‘0’
(ADFM = 1)
MSB
LSB
bit 7
bit 0
bit 7
bit 0
Unimplemented: Read as ‘0’
10-bit A/D Result
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